The synchronous vs. asynchronous design debate erupts every now and then, usually when a vocal minority swears by asynchronous design, often claiming that asynchronous design delivers higher ...

Two companies that exhibited at the Embedded Systems Conference in San Jose, CA, in April have similar objectives but for different technologies. Coventor, a vendor of CAD and analysis tools for ...

The future of asynchronous logic design is looking a little bit brighter. As the semiconductor industry struggles with mounting problems trying to achieve significant yields, higher performances and ...

There are a number of interesting technologies to keep an eye on in term of how and when they could be adopted for use in SoC design today, some of which include gallium arsenide, GPGPUs, 3D ICs and ...

Non-mainstream technologies can offer advantages over more commonly used approaches, but usually at some additional cost (otherwise they’d probably be mainstream). The additional cost could be in ...

When ICs first became available to electronics engineers 30 years ago, oscilloscopes could no longer do the job. Asynchronous logic designs with multiple pins gave rise to multipath race conditions.

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...

We don't have a perpetual general thread, so.... This video sounds kind of interesting. From what it sounds like, there are a number of circuits (one for each operation) on tiles in the CPU (not like ...

Two companies at the Embedded Systems Conference this week have similar objectives, but for very different technologies. Coventor, a vendor of CAD and analysis tools for creating MEMS devices, ...