Design-Reuse

ARC introduces 16/32-bit instruction set architecture to reduce memory requirements by up to 30 per cent

ARC's configurable processor adds the ability to run both 16 and 32-bit instructions on a 32-bit architecture, allowing designers to reduce memory requirements by up to 30%, resulting in both lower ...
Electronics Weekly

ARM mixes 16-, 32-bit instructions in Thumb-2

ARM has updated its Thumb 16-bit microprocessor instruction set, allowing it to be used by operating systems and interrupts. Extra instructions in Thumb-2 can also be mixed with standard 32-bit ...
EDN

Understanding Assembly Language for IA-32 and Intel 64 Architectures – Part 1: Basic overview and instruction set extensions

First, architecture basics are detailed with information on the register sets, data types, and memory and instruction formats. Next, instruction set extensions are detailed, which include Intel® ...
Design-Reuse

Lexra Announces the Fastest 32-BIT RISC Core to Execute MIPS® Instructions*

WALTHAM, MASS (July 19, 1999) – Lexra, a leading developer of processor cores for embedded applications, announced today the LX4280, the fastest 32-bit RISC core available to support the MIPS I® ...