heise online

QEMU 10 improves RISC-V machines and brings accelerated Apple graphics

QEMU 10 delivers a lot of new features for RISC-V and ARM users. Apple systems get accelerated graphics in VMs with macOS. The QEMU developers (Quick-EMUlator) have released version 10.0.0 of their ...
InfoQ

GraalVM Native Image on RISC-V

Unlock the full InfoQ experience by logging in! Stay updated with your favorite authors and topics, engage with content, and download exclusive resources. Vivek Yadav, an engineering manager from ...
Electronic Design

Low-Power Play: GAP8 Weds Multicore RISC-V with Machine Learning

Machine learning (ML) on the edge often involves convolutional neural networks (CNNs). This can be done using standard processors, but there’s a cost due to performance and matching power requirements ...
Semiconductor Engineering

RISC-V Is Thriving: Here’s What You Need to Know

RISC-V, the open-standard Instruction Set Architecture (ISA) conceived by UC Berkeley developers in 2010, is going from strength to strength. The RISC in RISC-V stands for Reduced Instruction Set ...
Design-Reuse

RISC-V: The Open-Source Revolution in CPU Architecture

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...