Hardware designers and verification engineers have embraced the use of assertions. They are a way to formally specify a design's intended behavior, which must hold true during the course of a design ...

Design-for-verification (DFV) using assertions has received much attention in the recent technical press. Coverage has ranged from standardization efforts for assertion languages to complete DFV ...

2023 is a transitional year for sustainability data. IFRS, the global accounting standards body, has been remarkably clear: By January 2024, companies should be using accounting-based standards to ...

Why is it still so hard to ensure good quality sign-off happens without leaving behind bugs in silicon? The answer, according to my colleagues at DVCon, is highly nuanced. The industry has been ...

Theoretically, the use—and subsequent reuse—of intellectual property (IP) should ease the pain of verification. IP lets designers break up the project into self-contained functional blocks, each of ...