To describe parts of embedded systems, designers will frequently use state machines, and that often means leveraging modeling tools like UML. These models are sometimes part of the certification ...

Raindrops on roses, and whiskers on kittens. They’re ok, but state machines are absolutely on our short list of favorite things. There are probably as many ways to implement a state machine as there ...

This installment starts a new segment of lessons about state machines. The subject conceptually continues the event-driven theme and is one of my favorites [1,2]. Today, you’ll learn what event-driven ...

As design size and complexity grows, the design verification effort grows even more. It takes significant amount of time to thoroughly verify complex control logic of a design, which is the key and ...